SynTest offers a highly competitive compensation package. In addition, we offer very attractive incentive stock options for highly motivated people. Index: Independent Sales Representatives (ISRs) Sr. Corporate Applications Engineer (CAE) Sr. R&D Engineer (RDE) Independent Sales Representatives (ISRs) Locations: Sunnyvale/Bay Area, California Southern California Texas We are looking for aggressive and talented Independent Sales Representatives (ISRs) to share in the growth and success of SynTest with us. These are positions with attractive commission, and there is a great potential for the right person to grow into a permanent salaried/commissioned position within the company. SynTest's Design-for-Test (DFT) products include tools for full scan insertion and automatic test pattern generation (ATPG) with VirtualScan for generating XtremeCompact test data, as well as tools for logic-BIST and memory-BIST implementation, checking DFT rules violations, boundary-scan (JTAG) insertion and fault simulation. SynTest also offers Consulting Services for: - DFT insertion and fault grading based on SynTest products - Physical Design and Full Turnkey (FTK) involving SoC implementation and production This is a great opportunity for someone who enjoys working with many types of customers and seeing different types of ASIC designs being brought successfully to silicon. Major Responsibilities and Duties: Each SynTest ISR will be a member of the Sales Group responsible for meeting "Assigned" Individual Sales Quota. Major duties include: Generating sales forecast Developing new accounts for SynTest DFT products and services Acting as liaison between technical teams (Field and Corporate AEs) and customers Managing the sales process to successful revenue closure Ensuring customer satisfaction through post-sales follow-up Some travel may be necessary depending on the customer mix Minimum Requirements and Necessary Skills: - MS/BS degree in Computer Science or Electronics Engineering - 5-10 years experience as an EDA Account Sales Manager with a track record of exceeding sales targets or consistently exceeding ISR individual and team goals - Knowledge of application of EDA/DFT tools and ASIC Design Flow is a must - Knowledge of IDM, ASIC Fabless Semiconductor companies - Knowledge of Competitors' DFT tools and solutions is a plus - Proven ability to develop a prospect list, build a pipeline of opportunities and close business - Start-ups customer base and contacts in the Bay Area are a must - Good communication, presentation, people, relationship and sales skills - Ability to travel as necessary To Apply: Please e-mail resume and cover letter to Harry Yoon (harry@syntest.com) Sr. Corporate Applications Engineer (CAE) Location - Sunnyvale, CA, USA. To join SynTest's Corporate Applications Engineering (CAE) Group. The main charter of the CAE group is to support the sales organization in promoting SynTest tools and to support customers in Design-for-Test (DFT) implementation projects using SynTest's state-of-art DFT technologies. As part of the CAE group, the candidate will have great opportunities to participate in customer visits, as well as have a good influence in product directions in improving customer's product quality, cost and development time by providing feedback based on customer input. Duties include: Performing DFT services Presales support (including customer visit, product presentation and product evaluation) Post-sales support Working with R&D to improve product performance and features Assisting in product documentation and Software Quality Assurance (SQA) process activities Conducting SynTest tool training. Requirements: BSEE/MSEE with 3 - 5 years of experience in ASIC design, and Design-for-Test (DFT) implementation including JTAG, Memory BIST, LogicBIST, Scan synthesis and ATPG. The candidate should be familiar with fault simulation. The candidate should have strong c/c++ and Perl5 programming skills. A good of knowledge of Verilog, RTL coding and CAD tools; and good presentation and technical writing skills are preferable. The canditate must be able to manage multiple tasks and have leadership and good communication skills; demonstrate a high level of courtesy and efficiency with customers; continuously work to exceed customer expectations through proactive servicing skills; demonstrate personal responsibility/ownership of customer problems; and work diligently towards a resolution to meet the customer's expectations in a timely manner. To Apply: Please e-mail resume and cover letter to employment@syntest.com Sr. R&D Engineer Location - Sunnyvale, CA, USA. Research, design and development computer aided test tools for VLSI (Very Large Scale Intergrated-Circuits) chip testability design including scan, BIST (Built-In-Self-Test), JTAG (Joint-Test-Action Group), fault modeling, simulation, grading, test pattern generation, logic synthesis, state machine design and high-speed circuit design using logic simulation and synthesis tools, hardware description language coding, data structure and algorithms design for fault simulation, and ATPG (Automatic-Test Pattern Generation). Generate System-on-a-Chip (SOC) system level tests with core IP (Intellectual Property) protected, generate SOC tests hierarchically through parallel ATPG process. Requirements: Ph.D. in Electrical Engineering with research focus on VLSI chip testability design, such as ATPG. To Apply: Please e-mail resume and cover letter to employment@syntest.com Attention Employment Agencies/Recruiters: Thanks for your interest in SynTest Technologies. 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